documentation/bookmark/hardware/fpga__field_programmable_gate_array.md


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# Reference

0. []()
0. [Parallel Programming for FPGAs](https://kastner.ucsd.edu/hlsbook/)
0. [C++20 on Xilinx FPGA with SYCL for Vitis - Ronan Keryell - CppCon 2021](https://www.youtube.com/watch?v=BJBDmQJdDpc)