Re-named "spec" hierarchy to "specification".

1 files changed, 48 insertions, 0 deletions

diff --git a/stdlib/source/specification/compositor/generation/primitive.lux b/stdlib/source/specification/compositor/generation/primitive.lux
new file mode 100644
index 000000000..3b6dd657b
--- /dev/null
+++ b/stdlib/source/specification/compositor/generation/primitive.lux
@@ -0,0 +1,48 @@
+(.module:
+  [lux #*
+   ["_" test (#+ Test)]
+   [abstract
+    [monad (#+ do)]]
+   [control
+    [pipe (#+ case>)]
+    ["." try]]
+   [data
+    ["." bit ("#\." equivalence)]
+    [number
+     ["f" frac]]
+    ["." text ("#\." equivalence)
+     ["%" format (#+ format)]]]
+   [math
+    ["r" random]]
+   [tool
+    [compiler
+     ["." synthesis]]]]
+  [///
+   [common (#+ Runner)]])
+
+(def: (f/=' reference subject)
+  (-> Frac Frac Bit)
+  (or (f.= reference subject)
+      (and (f.not-a-number? reference)
+           (f.not-a-number? subject))))
+
+(def: #export (spec run)
+  (-> Runner Test)
+  (`` ($_ _.and
+          (~~ (template [<evaluation-name> <synthesis> <gen> <test>]
+                [(do r.monad
+                   [expected <gen>]
+                   (_.test (%.name (name-of <synthesis>))
+                           (|> (run <evaluation-name> (<synthesis> expected))
+                               (case> (#try.Success actual)
+                                      (<test> expected (:assume actual))
+
+                                      (#try.Failure _)
+                                      false))))]
+
+                ["bit" synthesis.bit  r.bit  bit\=]
+                ["i64" synthesis.i64  r.i64  "lux i64 ="]
+                ["f64" synthesis.f64  r.frac  f.=']
+                ["text" synthesis.text (r.ascii 5) text\=]
+                ))
+          )))