diff options
author | Eduardo Julian | 2017-10-12 15:22:25 -0400 |
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committer | Eduardo Julian | 2017-10-12 15:22:25 -0400 |
commit | 1acc9f4cdd7b7cff29351594fa603c3b6fa4c666 (patch) | |
tree | 32db1b85c7972c564a0250cf46d11e0f98c49806 /new-luxc/source/luxc/generator/host/jvm | |
parent | f3acc0d67e6cd4e7245c1e169a3c0469da4373a3 (diff) |
- Compilation and tests for arithmetic, bit-wise operations and order.
Diffstat (limited to 'new-luxc/source/luxc/generator/host/jvm')
-rw-r--r-- | new-luxc/source/luxc/generator/host/jvm/inst.lux | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/new-luxc/source/luxc/generator/host/jvm/inst.lux b/new-luxc/source/luxc/generator/host/jvm/inst.lux index ebf12023f..7a6215804 100644 --- a/new-luxc/source/luxc/generator/host/jvm/inst.lux +++ b/new-luxc/source/luxc/generator/host/jvm/inst.lux @@ -36,11 +36,12 @@ GOTO) <var> (declare ILOAD LLOAD DLOAD ALOAD ISTORE LSTORE ASTORE) - <arithmethic> (declare IADD ISUB - LADD LSUB LMUL LDIV LREM - LCMP - DADD DSUB DMUL DDIV DREM - DCMPG DCMPL) + <arithmethic> (declare IADD ISUB IMUL IDIV IREM + LADD LSUB LMUL LDIV LREM LCMP + FADD FSUB FMUL FDIV FREM FCMPG FCMPL + DADD DSUB DMUL DDIV DREM DCMPG DCMPL) + <bit-wise> (declare IAND IOR IXOR ISHL ISHR IUSHR + LAND LOR LXOR LSHL LSHR LUSHR) <return> (declare RETURN IRETURN LRETURN DRETURN ARETURN)] (host;import org.objectweb.asm.Opcodes (#static NOP int) @@ -60,14 +61,8 @@ <var> - (#static LAND int) - (#static LOR int) - (#static LXOR int) - (#static LSHL int) - (#static LSHR int) - (#static LUSHR int) - <arithmethic> + <bit-wise> (#static AALOAD int) (#static AASTORE int) @@ -161,17 +156,23 @@ [F2D] [F2I] [F2L] [I2B] [I2C] [I2D] [I2F] [I2L] [I2S] [L2D] [L2F] [L2I] - - ## Long bitwise - [LAND] [LOR] [LXOR] [LSHL] [LSHR] [LUSHR] ## Integer arithmetic - [IADD] [ISUB] + [IADD] [ISUB] [IMUL] [IDIV] [IREM] + + ## Integer bitwise + [IAND] [IOR] [IXOR] [ISHL] [ISHR] [IUSHR] ## Long arithmethic [LADD] [LSUB] [LMUL] [LDIV] [LREM] [LCMP] + ## Long bitwise + [LAND] [LOR] [LXOR] [LSHL] [LSHR] [LUSHR] + + ## Float arithmetic + [FADD] [FSUB] [FMUL] [FDIV] [FREM] [FCMPG] [FCMPL] + ## Double arithmetic [DADD] [DSUB] [DMUL] [DDIV] [DREM] [DCMPG] [DCMPL] |