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author | Eduardo Julian | 2022-08-14 21:02:22 -0400 |
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committer | Eduardo Julian | 2022-08-14 21:02:22 -0400 |
commit | 0f9bc13a34b729d9ae9db31276feb2a66785d06b (patch) | |
tree | 25f8ec214bfe56f7dc7d8be637b06d1ab6a425f6 /documentation/bookmark/hardware/fpga.md | |
parent | 24e4ccef052816f17ccfc55f2e515a07cc9c2067 (diff) |
Documentation changes for v0.7.0
Diffstat (limited to 'documentation/bookmark/hardware/fpga.md')
-rw-r--r-- | documentation/bookmark/hardware/fpga.md | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/documentation/bookmark/hardware/fpga.md b/documentation/bookmark/hardware/fpga.md deleted file mode 100644 index 8dce079ca..000000000 --- a/documentation/bookmark/hardware/fpga.md +++ /dev/null @@ -1,4 +0,0 @@ -# Reference - -0. [C++20 on Xilinx FPGA with SYCL for Vitis - Ronan Keryell - CppCon 2021](https://www.youtube.com/watch?v=BJBDmQJdDpc) - |