summaryrefslogtreecommitdiff
path: root/tests/coq/misc/Bitwise.v
diff options
context:
space:
mode:
authorGuillaume Boisseau2024-05-24 17:10:02 +0200
committerGitHub2024-05-24 17:10:02 +0200
commit4971b7edf4538144df735f9fa5327fe4d0e2e003 (patch)
tree979ed531f66c3b0040fa5714fa70db606ca786c0 /tests/coq/misc/Bitwise.v
parentfbfa0e13ab56ee847e891fa7d798d2eb226b6794 (diff)
parent3adbe18d36df3767e98f30b760ccd9c6ace640ad (diff)
Merge pull request #206 from AeneasVerif/subdir
Diffstat (limited to '')
-rw-r--r--tests/coq/misc/Bitwise.v10
1 files changed, 5 insertions, 5 deletions
diff --git a/tests/coq/misc/Bitwise.v b/tests/coq/misc/Bitwise.v
index d0dbfd51..610f4ea8 100644
--- a/tests/coq/misc/Bitwise.v
+++ b/tests/coq/misc/Bitwise.v
@@ -9,29 +9,29 @@ Local Open Scope Primitives_scope.
Module Bitwise.
(** [bitwise::shift_u32]:
- Source: 'tests/src/bitwise.rs', lines 4:0-4:31 *)
+ Source: 'tests/src/bitwise.rs', lines 5:0-5:31 *)
Definition shift_u32 (a : u32) : result u32 :=
t <- u32_shr a 16%usize; u32_shl t 16%usize
.
(** [bitwise::shift_i32]:
- Source: 'tests/src/bitwise.rs', lines 11:0-11:31 *)
+ Source: 'tests/src/bitwise.rs', lines 12:0-12:31 *)
Definition shift_i32 (a : i32) : result i32 :=
t <- i32_shr a 16%isize; i32_shl t 16%isize
.
(** [bitwise::xor_u32]:
- Source: 'tests/src/bitwise.rs', lines 18:0-18:37 *)
+ Source: 'tests/src/bitwise.rs', lines 19:0-19:37 *)
Definition xor_u32 (a : u32) (b : u32) : result u32 :=
Ok (u32_xor a b).
(** [bitwise::or_u32]:
- Source: 'tests/src/bitwise.rs', lines 22:0-22:36 *)
+ Source: 'tests/src/bitwise.rs', lines 23:0-23:36 *)
Definition or_u32 (a : u32) (b : u32) : result u32 :=
Ok (u32_or a b).
(** [bitwise::and_u32]:
- Source: 'tests/src/bitwise.rs', lines 26:0-26:37 *)
+ Source: 'tests/src/bitwise.rs', lines 27:0-27:37 *)
Definition and_u32 (a : u32) (b : u32) : result u32 :=
Ok (u32_and a b).