From 41495e32d3f5f88b5f189f48dd4fdbfa883c6ac0 Mon Sep 17 00:00:00 2001
From: Eduardo Julian
Date: Mon, 14 Mar 2022 18:27:37 -0400
Subject: De-sigil-ification: >

---
 .../compositor/generation/primitive.lux            | 49 +++++++++++-----------
 1 file changed, 25 insertions(+), 24 deletions(-)

(limited to 'stdlib/source/specification/compositor/generation/primitive.lux')

diff --git a/stdlib/source/specification/compositor/generation/primitive.lux b/stdlib/source/specification/compositor/generation/primitive.lux
index c7d486553..a193aa16f 100644
--- a/stdlib/source/specification/compositor/generation/primitive.lux
+++ b/stdlib/source/specification/compositor/generation/primitive.lux
@@ -1,24 +1,24 @@
 (.using
-  [lux "*"
-   ["_" test {"+" Test}]
-   [abstract
-    [monad {"+" do}]]
-   [control
-    [pipe {"+" case>}]
-    ["[0]" try]]
-   [data
-    ["[0]" bit ("[1]#[0]" equivalence)]
-    [number
-     ["f" frac]]
-    ["[0]" text ("[1]#[0]" equivalence)
-     ["%" format {"+" format}]]]
-   [math
-    ["r" random]]
-   [tool
-    [compiler
-     ["[0]" synthesis]]]]
-  [///
-   [common {"+" Runner}]])
+ [lux "*"
+  ["_" test {"+" Test}]
+  [abstract
+   [monad {"+" do}]]
+  [control
+   ["[0]" pipe]
+   ["[0]" try]]
+  [data
+   ["[0]" bit ("[1]#[0]" equivalence)]
+   [number
+    ["f" frac]]
+   ["[0]" text ("[1]#[0]" equivalence)
+    ["%" format {"+" format}]]]
+  [math
+   ["r" random]]
+  [tool
+   [compiler
+    ["[0]" synthesis]]]]
+ [///
+  [common {"+" Runner}]])
 
 (def: (f/=' reference subject)
   (-> Frac Frac Bit)
@@ -34,11 +34,12 @@
                    [expected <gen>]
                    (_.test (%.symbol (symbol <synthesis>))
                            (|> (run <evaluation_name> (<synthesis> expected))
-                               (case> {try.#Success actual}
-                                      (<test> expected (:expected actual))
+                               (pipe.case
+                                 {try.#Success actual}
+                                 (<test> expected (:expected actual))
 
-                                      {try.#Failure _}
-                                      false))))]
+                                 {try.#Failure _}
+                                 false))))]
 
                 ["bit" synthesis.bit  r.bit  bit#=]
                 ["i64" synthesis.i64  r.i64  "lux i64 ="]
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